Start-up circuit for low-power indoor light energy harvesting applications

A start-up circuit, used in a micro-power indoor light energy harvesting system, is described. This start-up circuit achieves two goals: first, to produce a reset signal, power-on-reset (POR), for the energy harvesting system, and secondly, to temporarily shunt the output of the photovoltaic (PV) cells, to the output node of the system, which is connected to a capacitor. This capacitor is charged to a suitable value, so that a voltage step-up converter starts operating, thus increasing the output voltage to a larger value than the one provided by the PV cells. A prototype of the circuit was manufactured in a 130 nm CMOS technology, occupying an area of only 0.019 mm(2). Experimental results demonstrate the correct operation of the circuit, being able to correctly start-up the system, even when having an input as low as 390 mV using, in this case, an estimated energy of only 5.3 pJ to produce the start-up

Growth Responses of \u3ci\u3eAcacia angustissima\u3c/i\u3e to Vesicular-Arbuscular Mycorrhizal Inoculation

The response of Acacia angustissima to VAM species (Acaulospora laevis, A. muricata, Entrophosphora colombiana, Glomus mosseae, G. fasciculatum, G. macrocarpum, G. etunicatum, Gigaspora margarita, G. gigantea and Scutellospora heterogama) was evaluated under greenhouse conditions, in a P-deficient clayey Oxisol of pH 5.5. The soil was sterilized at 110oC for one hour each day for three days and reinoculated with a soil microbial suspension free of mycorrhizal fungi spores. The several VAM fungi were effective in increasing DM yield, nodulation, and N and P uptake of A. angustissima plants. The most efficient species were E. colombiana, A. muricata, and S. heterogama

Los Reyes Católicos D. Fernando y Dª Isabel

Copia digital. Valladolid : Junta de Castilla y León. Consejería de Cultura y Turismo, 201

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback

IEEE International Symposium on Circuits and Systems, pp. 2258 – 2261, Seattle, EUAA low-power 1.2 V 6-bit 1-GS/s time-interleaved pipeline ADC designed in 130 nm CMOS is described. It is based on a new 2-channel 1.5-bit MDAC that performs openloop residue amplification using a shared amplifier employing local-feedback. Time mismatches between channels are highly attenuated, simply by using two passive front-end Sample-and-Hold circuits, with dedicated switch-linearization control circuits, driven by a single clock phase. Simulated results of the ADC achieve 5.35-bit ENOB, with 20 mW and without requiring any gain control/calibration scheme

Digital-domain self-calibration technique for video-rate pipeline A/D converters using Gaussian white noise

Electronics Letters Vol.38, nº 19A digital-domain selfsalibmtion technique for video-rate pipeline AID converters based an a Gaussian white noise input signal is presented. The pmposed algorithm is simple and efficient. A design example is shown 10 illustrate that the overall linemiry of a pipeline ADC can be highly improved using this technique

Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies

This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths

Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids

15th IEEE International Conference on Electronics, Circuits and Systems, MaltaThis paper presents the possibility of employing nonlinear low-resolution DACs in the feedback paths of multi-bit second-order Sigma-Delta modulators. The proposed technique is particularly attractive in applications such as hearing aids, requiring a very large dynamic range and medium signal-tonoise-plus-distortion-ratio. As demonstrated through simulated results in which noise and mismatch effects are included, for the same over-sampling ratio, improvements in the order of 6-to-9 dB in the dynamic range can be achieved when comparing with the same topology employing linear-DACs

Controlo por fase única de conversores A/D de baixa tensão

Este trabalho apresenta a aplicação de um controlo de fase única a um conversor concorrencial de baixa tensão. Com vista à validação da análise e conclusão teóricas, um conversor concorrencial de 10-bit 4 MS/s foi projectado e simulado. Foi primeiramente simulado com um controlo clássico de 6 fases, e posteriormente com um esquema de fase única. Os resultados de simulação mostram que as características globais são mantidas, apontando para que o uso de esquemas de fase única em conversores de baixa tensão seja uma solução que reduz a complexidade dos sistemas clássicos não sobrepostos.info:eu-repo/semantics/publishedVersio